Measurements and simulations of low dark count rate single photon avalanche diode device in a low voltage 180-nm CMOS image sensor technology

This paper presents the key features of single photon avalanche diode (SPAD) devices fabricated in a low voltage commercial 180-nm CMOS image sensor technology exhibiting very low dark count rate (DCR). The measured DCR is < 100 Hz at room temperature even for excess voltages above 2 V. The active junction of the SPAD measures 10 μm in diameter within a 24-μm test structure. The active region where Geiger avalanche occurs is determined by an implanted charge sheet. Edge avalanche is averted by utilizing a virtual guard ring, formed by the retrograde well profile. The design, measurements, and simulations of doping and electric field profiles that lead to such low DCR are reported and analyzed. The current-voltage characteristics and the temperature dependence of the breakdown voltage provide further, indirect evidence for the low DCR measured in the device. Thus, the key features of measured good SPADs are presented and are correlated with simulations that give physical insight on how to design high-performance SPADs.