Revisiting thermal effects in submicron CMOS-SOI transistors

Maria Malits, Alexander Svetlitza, Dan Corcos, Danny Elad, Yael Nemirovsky

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In this study we report measurements and modeling of true channel temperature of CMOS-SOI transistors. It is shown that the temperature rise is significant, above 100K, for transistors with applied power of ∼0.1 milliwatt. The CMOS-SOI transistors were designed and fabricated with a standard partially depleted CMOS SOI 0.18μm process. It is shown that the local heating of the channel carriers may result in higher temperatures than predicted by the conventional steady-state thermal analysis. Modeling based on channel's thermoelectric effects is applied to account for the observed local-heating. The results of this study have impact on circuit design and may be extended to regular CMOS submicron technology.

Original languageEnglish
Title of host publication2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011
DOIs
StatePublished - 2011
Event2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011 - Tel Aviv, Israel
Duration: 7 Nov 20119 Nov 2011

Publication series

Name2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011

Conference

Conference2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011
Country/TerritoryIsrael
CityTel Aviv
Period7/11/119/11/11

Keywords

  • Channel temperature
  • Joule heating
  • Peltier heating
  • Silicon-On-Insulator
  • thermal effects
  • threshold voltage

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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