TY - JOUR
T1 - Thermal performance of CMOS-SOI transistors from weak to strong inversion
AU - Malits, Maria
AU - Corcos, Dan
AU - Svetlitza, Alexander
AU - Elad, Danny
AU - Nemirovsky, Yael
N1 - Funding Information:
Fellow, and a tenured member of the Faculty of Electrical Engineering at Technion-Israel Institute of Technology. Her current main focus is on CMOS-SOI-NEMS imagers and system-on-chip approach. She has published approximately 180 papers in refereed journals, co-presented over 200 talks in conferences and filed for over twenty-five patents. Dr. Nemirovsky is the recipient of the Israeli national award “The Award for the Security of Israel,” and Technion awards for “Best Teacher” and “Novel Applied Research.” She also received the Kidron Foundation award for “Innovative Applied Research,” an Intel award and the USA R&D 100 2001 award recognizing the top 100 new inventions and products of the year in USA. In addition, she is the recipient of the 2008 IBM faculty award.
PY - 2012
Y1 - 2012
N2 - A promising solution to continue the complementary metal-oxide semiconductor (CMOS) scaling roadmap at the 22 nm technology node and beyond is CMOS-silicon on insulator (SOI), which is used especially in low-power and "system on chip" applications [1]. CMOS-SOI involves building conventional MOSFETs on very thin layers of crystalline silicon. The thin layer of silicon is separated from the substrate by a thick layer of buried SiO 2 film, thus isolating the devices from the underlying silicon substrate and from each other. CMOS-SOI technology is already a leading technology in a wide range of applications where integrated CMOS-SOI- microelectromechanical systems or nanoelectromechanical systems (MEMS/NEMS) technologies provide unique sensing systems for IR and terahertz (THz) imagers.
AB - A promising solution to continue the complementary metal-oxide semiconductor (CMOS) scaling roadmap at the 22 nm technology node and beyond is CMOS-silicon on insulator (SOI), which is used especially in low-power and "system on chip" applications [1]. CMOS-SOI involves building conventional MOSFETs on very thin layers of crystalline silicon. The thin layer of silicon is separated from the substrate by a thick layer of buried SiO 2 film, thus isolating the devices from the underlying silicon substrate and from each other. CMOS-SOI technology is already a leading technology in a wide range of applications where integrated CMOS-SOI- microelectromechanical systems or nanoelectromechanical systems (MEMS/NEMS) technologies provide unique sensing systems for IR and terahertz (THz) imagers.
UR - http://www.scopus.com/inward/record.url?scp=84867174149&partnerID=8YFLogxK
U2 - 10.1109/MIM.2012.6314512
DO - 10.1109/MIM.2012.6314512
M3 - ???researchoutput.researchoutputtypes.contributiontojournal.article???
AN - SCOPUS:84867174149
SN - 1094-6969
VL - 15
SP - 28
EP - 34
JO - IEEE Instrumentation and Measurement Magazine
JF - IEEE Instrumentation and Measurement Magazine
IS - 5
M1 - 6314512
ER -