Optimization of integrated 0.18μm nLDMOS, for power management ICs rated at 40-60V

Amit Tannenbaum; David Mistele; Yinnon Stav

doi:10.1109/COMCAS.2017.8244821

Optimization of integrated 0.18μm nLDMOS, for power management ICs rated at 40-60V

Amit Tannenbaum, David Mistele, Yinnon Stav

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Scopus citations

Abstract

Dimensions Optimization of LDMOS (Laterally Diffused Metal Oxide Semiconductor) Field Effect Transistors, utilizing SOX (Step Oxide) for drift region structuring, is studied. Using TCAD modeling and subsequent layout and process variations, based on TowerJazz's 0.18μm BCD (Bipolar-CMOS-DMOS) process, state-of-the-art BV (Breakdown Voltage) and Rdson (On-resistance) are achieved. The figures of merit for voltage rated applications up to 50V are similar or better compared to more complex approaches. Drift length, ratio of field-plate-length over SOX, as well as SOX thickness variations, enable very competitive BV / Rdson rates of > 55V / 30mΩ mm². Fabricated devices demonstrated similar figure of merit and a BV range up to 70V.

Original language	English
Title of host publication	2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017
Pages	1-5
Number of pages	5
ISBN (Electronic)	9781538631690
DOIs	https://doi.org/10.1109/COMCAS.2017.8244821
State	Published - 28 Jun 2017
Externally published	Yes
Event	2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017 - Tel-Aviv, Israel Duration: 13 Nov 2017 → 15 Nov 2017

Publication series

Name	2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017
Volume	2017-November

Conference

Conference	2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017
Country/Territory	Israel
City	Tel-Aviv
Period	13/11/17 → 15/11/17

Keywords

Breakdown voltage
LDMOS
PMIC
Power MOSFET
TCAD

ASJC Scopus subject areas

Radiation
Computer Networks and Communications
Electrical and Electronic Engineering

Access to Document

10.1109/COMCAS.2017.8244821

Cite this

Tannenbaum, A., Mistele, D., & Stav, Y. (2017). Optimization of integrated 0.18μm nLDMOS, for power management ICs rated at 40-60V. In 2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017 (pp. 1-5). (2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017; Vol. 2017-November). https://doi.org/10.1109/COMCAS.2017.8244821

Tannenbaum, Amit ; Mistele, David ; Stav, Yinnon. / Optimization of integrated 0.18μm nLDMOS, for power management ICs rated at 40-60V. 2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017. 2017. pp. 1-5 (2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017).

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title = "Optimization of integrated 0.18μm nLDMOS, for power management ICs rated at 40-60V",

abstract = "Dimensions Optimization of LDMOS (Laterally Diffused Metal Oxide Semiconductor) Field Effect Transistors, utilizing SOX (Step Oxide) for drift region structuring, is studied. Using TCAD modeling and subsequent layout and process variations, based on TowerJazz's 0.18μm BCD (Bipolar-CMOS-DMOS) process, state-of-the-art BV (Breakdown Voltage) and Rdson (On-resistance) are achieved. The figures of merit for voltage rated applications up to 50V are similar or better compared to more complex approaches. Drift length, ratio of field-plate-length over SOX, as well as SOX thickness variations, enable very competitive BV / Rdson rates of > 55V / 30mΩ mm2. Fabricated devices demonstrated similar figure of merit and a BV range up to 70V.",

keywords = "Breakdown voltage, LDMOS, PMIC, Power MOSFET, TCAD",

author = "Amit Tannenbaum and David Mistele and Yinnon Stav",

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year = "2017",

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Tannenbaum, A, Mistele, D & Stav, Y 2017, Optimization of integrated 0.18μm nLDMOS, for power management ICs rated at 40-60V. in 2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017. 2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017, vol. 2017-November, pp. 1-5, 2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017, Tel-Aviv, Israel, 13/11/17. https://doi.org/10.1109/COMCAS.2017.8244821

Optimization of integrated 0.18μm nLDMOS, for power management ICs rated at 40-60V. / Tannenbaum, Amit; Mistele, David; Stav, Yinnon.
2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017. 2017. p. 1-5 (2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017; Vol. 2017-November).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - Dimensions Optimization of LDMOS (Laterally Diffused Metal Oxide Semiconductor) Field Effect Transistors, utilizing SOX (Step Oxide) for drift region structuring, is studied. Using TCAD modeling and subsequent layout and process variations, based on TowerJazz's 0.18μm BCD (Bipolar-CMOS-DMOS) process, state-of-the-art BV (Breakdown Voltage) and Rdson (On-resistance) are achieved. The figures of merit for voltage rated applications up to 50V are similar or better compared to more complex approaches. Drift length, ratio of field-plate-length over SOX, as well as SOX thickness variations, enable very competitive BV / Rdson rates of > 55V / 30mΩ mm2. Fabricated devices demonstrated similar figure of merit and a BV range up to 70V.

AB - Dimensions Optimization of LDMOS (Laterally Diffused Metal Oxide Semiconductor) Field Effect Transistors, utilizing SOX (Step Oxide) for drift region structuring, is studied. Using TCAD modeling and subsequent layout and process variations, based on TowerJazz's 0.18μm BCD (Bipolar-CMOS-DMOS) process, state-of-the-art BV (Breakdown Voltage) and Rdson (On-resistance) are achieved. The figures of merit for voltage rated applications up to 50V are similar or better compared to more complex approaches. Drift length, ratio of field-plate-length over SOX, as well as SOX thickness variations, enable very competitive BV / Rdson rates of > 55V / 30mΩ mm2. Fabricated devices demonstrated similar figure of merit and a BV range up to 70V.

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Tannenbaum A, Mistele D, Stav Y. Optimization of integrated 0.18μm nLDMOS, for power management ICs rated at 40-60V. In 2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017. 2017. p. 1-5. (2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017). doi: 10.1109/COMCAS.2017.8244821

Optimization of integrated 0.18μm nLDMOS, for power management ICs rated at 40-60V

Abstract

Publication series

Conference

Keywords

ASJC Scopus subject areas

Access to Document

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